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Cleaner Coolant, Fewer Failures: What Next-Gen High-TDP Chips Mean for Liquid Cooling Requirements
Thursday, December 3, 2026 | 11:00 AM EST | 1 hour
As AI accelerators like NVIDIA's Vera Rubin and Feynman push direct-to-chip liquid cooling toward 45°C warm-water operation and finer microchannel cold plates, coolant cleanliness has become a direct driver of reliability and uptime. Contamination, inhibitor depletion, and biofouling can quietly degrade thermal performance well before a failure appears at the rack.
Join PFX Group, Dell'Oro Group, and the OCP to learn how PG25 and water-based coolant requirements are evolving, what to monitor in the TCS loop, and practical criteria (filtration, sampling cadence, and material compatibility) for assessing fluid readiness before next-gen deployment.
You'll learn:
- Why fluid cleanliness matters for microchannel cold plates, including particle size and count
- Evolving coolant requirements for Vera Rubin and Feynman platforms
- How fluids age in service and which parameters to monitor
- Testing and remediation strategies for aging fluids
Who should attend:
- Data center operators, owners, and hyperscale/AI infrastructure teams
- CDU, rack, server, cold-plate, and chip manufacturers
- Thermal and data center engineers
- Service, commissioning, and hardware contractors
- Fleet and facility reliability owners
Meet Our Speakers
Director of Electrification Technology, PFX Group
Research Director, Data Center Physical Infrastructure, Data Center Liquid Cooling Markets, Dell'Oro Group
Chief Innovation Officer, Open Compute Project (OCP)
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